Thermal Via Array Calculator
FR-4 conducts heat about as well as wood. A via array under a hot part is the usual fix, and this sizes it: barrel copper and any fill act in parallel through the board, then all vias act in parallel with each other.
Choosing something to solve for makes Array thermal resistance an editable target and computes the chosen input from it.
Formula
| d | finished hole diameter (m) |
| p | barrel plating thickness (m) |
| t | board thickness (m) |
| N | number of vias in the array |
| k_cu | copper thermal conductivity (W/m/K) |
What this model assumes, and where it stops
Assumptions
- Heat flows straight down each via, perpendicular to the board.
- Uniform plating thickness over the full barrel length.
- The pad and plane copper at each end are isothermal.
- All vias carry equal heat.
- Steady state.
Limitations
- Spreading resistance into and out of the array is not included, and it is frequently larger than the array resistance itself. A small hot component feeding a wide via field sees mostly spreading, not via conduction.
- Equal sharing between vias is optimistic. Vias directly under the heat source carry far more than those at the edge of the array.
- Unfilled vias can wick solder during assembly, which changes the answer substantially in either direction depending on how much goes in.
- Plating thickness varies through the barrel, and the class minimum is not what you always get.
- The copper planes the vias land on are treated as perfect isothermal sinks; in reality their in-plane spreading sets the real performance.
- No account of the electrical or manufacturing constraints that usually limit via count in practice.
When you need a 3D field solution instead
Closed-form models like the one above hold on idealised geometry. These are the cases where they stop being good enough and a full 3D electromagnetic and thermal solution is the only way to get a trustworthy answer:
- Spreading resistance from the component footprint into the via field and out into the planes - normally the dominant term.
- Working out how many vias actually carry heat, rather than assuming the whole array does.
- Boards where the heat leaves sideways through plane copper rather than straight down.
- Interaction between several hot components sharing the same plane.
- Any case where the answer you need is a board temperature map rather than one resistance.
Common questions
How much does a thermal via array actually help?
The default 25-via array under a component drops the through-board resistance from 53 K/W of bare FR-4 to about 5.3 K/W - an eleven-fold improvement for fractions of a cent. FR-4 is such a poor conductor (about 0.3 W/(m.K) through-plane) that even thin copper barrels dominate it completely.
Do filled vias cool much better than plated ones?
Per via, noticeably: a solid copper fill conducts through the whole cross-section instead of a 25 um wall, cutting the single-via resistance several-fold. Per array, less than the price suggests - a plated 190 K/W via in a 25-via array is already down at 7.6 K/W, and the plane spreading on either side starts to dominate. Fill for solder-wicking control and flatness first, thermals second.
Why is my component still hot despite a via array?
Because the array is only the middle of the path. Heat must spread from a small die into the pad, squeeze through the array, then spread again into the plane and finally leave by convection somewhere. The spreading terms on both sides frequently exceed the array resistance this page reports, and no via array fixes a plane with nowhere to dump the heat.
References
- IPC-2152 - Standard for Determining Current Carrying Capacity, thermal test data on laminate conductivity
- Incropera & DeWitt - Fundamentals of Heat and Mass Transfer, 6th ed., ch. 3 on composite walls